Bipolar transistors are electronic devices with two P-N junctions that are in close proximity to one another. A common bipolar transistor has three regions: i) an emitter, ii) a collector, and iii) a base present between the emitter and the collector. If the emitter and the collector are doped with an n-type dopant and the base is doped with a p-type dopant, then the device is an “NPN” transistor. Alternatively, if the emitter and the collector are doped with a p-type dopant and the base is doped with an n-type dopant, then the device is a “PNP” transistor.
Despite the prevalence of CMOS FETs, bipolar transistors have superior device attributes in some areas, especially for analogue and power gain applications. Conventional bipolar devices require abrupt emitter-to-base junctions and well controlled base region lengths and are typically not scaled for circuit density of CMOS structures.
Vertical configurations can be used to reduce the size of semiconductor devices, such as bipolar transistors. See, for example, U.S. patent application Ser. No. 13/607,877, filed by J. Sleight et al., entitled “Fin Bipolar Transistors Having Self-Aligned Collector and Emitter Regions,” the entire contents of which are incorporated by reference herein.
However, as feature sizes of the devices get increasingly smaller, contacting the collector and emitter regions with the contact line becomes a major problem. In some instances, collector and emitter regions are used to contact the fins in order to provide mechanical stability during processing. However, the collector and emitter regions still need to be precisely aligned with the contact line in order to achieve a practical contact line pitch and to minimize variations in extrinsic resistance and parasitic capacitance. Thus, properly and consistently aligning the collector and emitter regions with the contact line is difficult.
Therefore, improved vertical bipolar transistor designs and techniques for fabrication thereof would be desirable.